FAMES – ChipsWIN Joint Event: Strengthening Semiconductor Innovation in Wallonia and Beyond
We are pleased to announce the upcoming FAMES – ChipsWIN workshop, jointly organised by the partners of the FAMES Pilot Line and ChipsWIN, the Walloon Chips Competence Centre.
Date: April 22, 2026
Location: Louvain-la-Neuve, Belgium (Foyer du Lac/Aula Magna and Maxwell Building)
ChipsWIN is a pioneering initiative supported by the European Chips Joint Undertaking (Chips JU) under the Digital Europe Programme (DIGITAL). Led by UCLouvain, Imagine Microelectronics and IGNITY, ChipsWIN aims to strengthen the European semiconductor ecosystem by bridging the gap between advanced research and industrial deployment. As a regional competence centre, it provides expertise, services and access to technologies to support innovation, sustainability and Europe’s technological sovereignty.
This workshop will bring together industry, RTOs and academia from Wallonia and neighbouring countries to explore how the FAMES Pilot Line’s advanced semiconductor technologies and the ChipsWIN competence centre can support collaboration and accelerate innovation across the local and European electronics ecosystem. A key objective is also to initiate a discussion within the community on how R&D developments can be effectively transferred to industry in the context of the Chips Act and beyond.
Whether you are an executive, engineer, researcher, startup founder or industry representative, this event is designed for you. Together, we can help close the lab‑to‑fab gap and contribute to a stronger, more resilient European semiconductor ecosystem.
Programme
Welcome coffee
08:30 – 08:55
Welcome address
08h55 – 09:00
Xavier Lepot, Director of Research Administration, UCLouvain
FAMES Developments
The FAMES Pilot Line, empowering next generation of chips
09:00 – 09:20
Dominique Noguet, FAMES Pilot Line coordinator, CEA-Leti
Bio - Dominique Noguet
Dominique Noguet is the coordinator of the FAMES Pilot Line, and VP at CEA-Leti. Prior to this role he held several positions as digital IC designer, lab manager and department manager. He led many projects at a national level and in several European frameworks (FP5, FP6, FP7). Dominique has authored or co-authored ~100 scientific papers (several best paper awards), several book chapters and 15 patents. He was a reviewer and a member of scientific committees of many conferences and a member of journal editorial boards. He was conference chair and TPC chair of several international conferences, and is an IEEE Senior Member. Dominique holds an engineering degree of the National Institute of Applied Sciences (INSA) in electrical engineering in 1992, and a PhD from National Polytechnical Institute of Grenoble (INPG) in 1998.
Overview of 10nm FD-SOI pathfinding PDK
9:20 – 9:35
Gerald Cibrario, CEA-Leti
Bio - Gérald Cibrario
Gérald Cibrario has been working at CEA-Leti since 2001. He contributed to the development of the first Process Design Kits on CEA-Leti’s emerging technologies, such as FD-SOI, embedded non-volatile memories and 3D sequential integration. He was the head of the Mask and Design Enablement laboratory for 8 years. Since March 2025, he has taken on the responsibility of the characterization, design, and simulation department within the silicon components division.
Emerging technologies for AI acceleration in FAMES
9:35 – 9:50
Martin Andraud, Gaurav Singh, UCLouvain
Bio - Martin Andraud
Martin Andraud is an assistant professor in microelectronics at UCLouvain, Belgium. He received his PhD from Grenoble University, France, in 2016. He was a postdoctoral researcher successively with TU Eindhoven in 2016 and KU Leuven from 2017 to 2019. Then, he was an assistant professor at Aalto University, Finland, from 2029 to 2023. His research interests include AI processor design for hybrid AI tasks (e.g., deep learning, neurosymbolic AI, or probabilistic AI) and hardware/software co-design, test, and reliability of custom ASIC for digital or mixed-signal AI processors.
Bio - Gaurav Singh
Gaurav Singh is currently working as a post-doc researcher at UCLouvain. He did his doctoral studies at the Department of Electronics and Nanoengineering, Aalto University, Finland and earned his M.Sc. degree in VLSI from Amity University, Noida, India. His research focuses on the development of low-power system-on-chip (SoC) solutions for sensor data processing. His work particularly explores microprocessors, memories, and peripheral interfaces to enhance communication and debugging. His research work also includes integrating RISC-V processors with Compute In-Memory cores as hardware accelerators, aimed at improving power efficiency in AI applications.
Magnetics on Silicon for Integrated Power and FAMES ACCESS
9:50: 10:05
Cian Ó Mathúna, Tyndall National Institute
Bio - Cian Ó Mathúna
Prof. Cian Ó Mathúna is Director of Integrated Power and Energy Systems Research at Ireland’s Tyndall National Institute, University College Cork. His team’s research, into the miniaturisation and integration of magnetics onto silicon, has contributed to disruptive developments of integrated power management for processors in portable and high performance computing. Using semiconductor fabrication of thin-film magnetics, the team have made bulky magnetic components disappear onto silicon chips. Called “MagIC”, Tyndall’s magnetics-on-silicon technology has been licensed to global electronics companies and foundries. In 2008, Cian founded the International Workshop on Power Supply on Chip (PwrSoC), now a flagship event for IEEE PELS and PSMA. Through his leadership, and his collaborations with world-leading industry players in Europe, USA and Asia, Ó Mathúna has influenced the emergence of global supply-chains for PwrSoC that has seen high-volume production of magnetics-on-silicon in commercial product. Cian is an IEEE Fellow and, in 2021, received the IEEE PELS Technical Achievement Award for Integration and Miniaturisation of Switching Power Converters and also received an EARTO (European Association of Research and Technology Organisations) Impact Innovation Award.
RF bandpass filter technology for the 7-15 GHz range and open access portfolio
10:05 – 10:20
Tuomas Pensala, VTT
Bio - Tuomas Pensala
Tuomas Pensala D. Sc. (Tech.) received the M. Sc. degree in Engineering Physics from the Helsinki University of Technology in 2000 and the D. Sc. (Tech.) degree in Applied Physics from the Aalto University in 2011. He has worked for the VTT Technical Research Centre of Finland since 1998 where he presently holds a position of Research Team Leader of the RF Microsystems team. His research interests include RF devices based on thin film technology such as GHz range BAW/FBAR resonators and filters and IPD. He has also worked on piezoelectric MEMS sensors and timing devices. He has authored and co-authored more than 50 scientific journal and conference papers on thin film, RF and MEMS devices and contributed to almost 30 patent families.
FAMES demonstrators: when FD-SOI meets mass market applications
10:20 – 10:55
Eric Mercier, CEA-Leti
Bio - Eric Mercier
Eric Mercier is Telecom Line Director at CEA-Leti as well as Deputy Head of the Wireless Unit. He is active in industrial partnership developments towards technology transfer and also in managing internal CEA-Leti program, amongst which the FAMES WP10 dedicated to demonstrators. Graduated from ENSEEIH Toulouse, France, in 1991, and with a 1st experience in the Optical Test Equipment (1992 – 1998), his main focuses of interest have covered activities from Low-Power IoT transceiver solutions as Marketing & Application Manager for Atmel (1999 – 2006), and later as Project Manager & Laboratory Head Manager at CEA-Leti from 2006. As a promoter of CEA-Leti RF/mmW research activities, he is committed to market & societal needs for next Telecom generation towards new technologies development, understanding how forthcoming scientific developments can be valued to that end.”
RF self-biased circulators
10:55 – 11:10
Jérémy Létang, SAL
Bio - Jérémy Létang
Jérémy Létang received MSc and PhD degrees in Nanoscience and Physics from Université Paris-Saclay, France. His PhD topic was on chaotic states and modulation effects in spin transfer torque oscillators. Then, he worked on coupling spin waves and surface acoustic waves in Palaiseau, and on spin accumulation in heavy metals in Nancy. He moved to Villach, Austria, to join SAL as a researcher in 2022, to work on various industrial research topic, including magnetoresistive current limiters and magnetic sensors related topics. Since 2025, he is managing the efforts to develop RF self-biased circulators at SAL within the FAMES pilot line.
“Accessing the FAMES Pilot Line Technologies”
11:30 – 11:45
Susana Bonnetier, CEA-Leti
Bio - Susana Bonnetier
Susana Bonnetier is a member of the FAMES Pilot Line management team and leads the Open Access effort since 2024. She is an MIT engineer with a background in industry and research in the USA and France. She worked for Freescale Semiconductor as R&D Engineer and contributed to the successful development of the 65nm and 45nm CMOS technology nodes within the Crolles 2 Alliance. Susana then joined CEA-Leti as head of a joint laboratory with a major French optics company, and later led CEA-Leti’s Carnot R&D program for 10 years, managing a 14M€/year budget. During that time, she was VP of the French Carnot Network and a member of its board of directors.
Chips JU Upcoming Calls
11:45 – 12:00
Francisco Ignacio, Chips JU 2026. Work Programme & Call Planning
SPW Research programmes, calls, and related initiatives
12:00 – 12:15
Cédric Morana, SPW
Bio - Cédric Morana
Cédric Morana is a Research and Innovation specialist at the Research Department of the Walloon Public Service for Economy, Employment and Research (SPW EER). In this role, he contributes to the design and implementation of support schemes for collaborative R&D, in close alignment with regional and European strategic priorities. He is notably involved as a programme manager for regional and European R&D programmes, including Horizon Europe and IPCEIs, aimed at strengthening European technological sovereignty and industrial competitiveness. Holding a PhD in Bioscience Engineering from KU Leuven, he has experience at the interface between academic research, industrial innovation and public policy. His activities cover the design and management of R&D and innovation support programmes, the evaluation of collaborative projects, and the development of strategic technological ecosystems. During this information day organised by CHIPSWIN and FAMES, he will share his expertise on the Walloon Region’s levers for supporting R&D and innovation, as well as on mechanisms fostering regional and international collaboration.
Panel discussion: “EU Chips Act: from R&D to industry”
12:15 – 13:00
Alessio Spessot, imec
Konrad Seidel, Fraunhofer
Piotr Wiśniewski, CEZAMAT-WUT
Thomas Di Pietro, I-Care Group
Denis Flandre, UCLouvain
Moderators:
Susana Bonnetier, CEA-Leti
Valeriya Kilchytska, UCLouvain
Bio - Alessio Spessot
Alessio Spessot is a Technical Account Director at imec, where he has been active since 2016, where he is coordinating and driving strategic industrial collaborations in advanced semiconductor research and development, together with the imec ecosystem. He received an M.Sc. degree in Physics (magna cum laude) from the University of Trieste in 2003 and a Ph.D. degree in Solid‑State Physics from the University of Modena in 2006. Prior to joining imec, he held technical and research positions at STMicroelectronics, Numonyx (co-owned by Intel), and Micron, where he contributed to the development of advanced CMOS technologies, DRAM, NAND, emerging memory arrays, and peripheral circuitry. His technical knowledge spanned device, process integration, System and Design Technology Co-Optimization of leading‑edge memory and logic technologies. At imec, Alessio Spessot serves as a key interface between imec’s R&D programs and global semiconductor industry partners, supporting long‑term research roadmaps, joint development programs, and technology transfer across logic, memory, and system‑level innovation domains. He and his team also contributes to the management of EU‑funded activities, supporting coordination with partners and ensuring alignment with project objectives, governance, and reporting requirements. For Fames, he contributes to the support of industry engagement, program structuring, and coordination between research, pilot‑line activities, and external partners, helping ensure that FAMES outcomes are relevant, transferable, and aligned with European strategic priorities.
Bio - Konrad Seidel
Konrad Seidel is managing the business unit Emerging Memory Solutions at Fraunhofer IPMS, Center Nanoelectronic Technologies. After receiving his diploma degree in Information Technology at TU Dresden in 2004, he joined the Flash memory development group of Infineon Flash and held different positions in the field of Reliability and Qualification of different memory concepts. In 2008, Konrad Seidel joined the Fraunhofer Society and worked on various integration and characterization activities as well as new device concepts. As manager he is responsible for research programs on advanced memory solutions including electrical characterization topics and system development.
Bio - Piotr Wiśniewski
Piotr Wiśniewski, Ph.D. Eng., is a Head of Intelligent Semiconductor Systems Division (SEMINSYS), Centre for Advanced Materials and Technologies CEZAMAT, Warsaw University of Technology. He received his MSc. Eng. degree in microelectronics, photonics, and nanotechnology, and a Ph.D. degree in electrical engineering from Warsaw University of Technology (WUT). Currently is the Head of the Intelligent Semiconductor Systems Department (SEMINSYS) and an assistant professor at the Centre for Advanced Materials and Technologies CEZAMAT WUT, responsible for managing the semiconductor technology line and R&D activities of the department. His research interests and expertise cover physics, modeling, and technology of semiconductor devices for micro / nano-electronics and photonics. He has been actively involved in national and international projects as a principal investigator or researcher, supported by various research agencies
Bio - Thomas Di Pietro
Thomas Di Pietro is the R&D Director at I-care Group, a global leader in machine health and industrial asset optimization (Industry 4.0). With over 15 years of experience in driving technological innovation, he manages strategic R&D partnerships between universities, research centers, and the industrial sector. Holding a Master’s degree in Industrial Engineering and a certificate in Artificial Intelligence from UMONS, Thomas has led the development of numerous electronic devices and wireless modules for predictive maintenance.
Lunch
ChipsWIN
Expertise & core skills
14:00 – 14:15
Denis Flandre, UCLouvain
Bio - Denis Flandre
Denis Flandre is full-time Professor at UCL. He is involved in the research and development of CMOS and thin-film transistors, digital and analog circuits, as well as memristors, sensors, MEMS and photovoltaic cells, for special applications, such as ultra low-voltage low-power, microwave, biomedical, autonomous, radiation-hardened or high-temperature electronics and microsystems. He is involved in several UCL technology platforms, i.e. Winfab micro-nano-fabrication cleanrooms, Welcome electronic / communication measurement lab and the Cyclotron Research Center. He has authored or co-authored more than 1200 technical papers and 12 patents. He organized or lectured many short courses on technology, devices and circuits in universities, industrial companies and conferences. He has been a co-founder or scientific advisor of several start-ups (CISSOID, INCIZE, e-peas, VoCSens…). He is a recipient of a European Research Council Synergy Grant for the SWIMS project (Stochastic Spiking Wireless Multimodal Sensory Systems, 2024-2030). He is involved in the FAMES pilot line project and coordinating the CHIPSWIN Walloon competence center funded in a frame of the EU Chip Act.
Access modalities
14:15 – 14:30
Thomas Walewyns, UCLouvain
Bio - Thomas Walewyns
Thomas Walewyns received the M.Sc. degree in electromechanical engineering and a Ph.D. degree in engineering sciences, both at the Université catholique de Louvain (UCLouvain), Louvain-la-Neuve, Belgium, in 2010 and 2016 respectively. In 2010, he obtained the AILouvain Innovation Award for his master thesis. From 2013 to 2015, he was also carrying out an Executive Master in Management at the Louvain School of Management. Specialized in microsensors, system integration and micro-/nano-fabrication, he is author and co-author of more than 20 scientific articles and conference papers, and holds 3 patents. Passionate about innovation and driven by business, he founded VOCSens, a UCLouvain spin-off developing selective multi-gas microsensors for environmental monitoring & industrial applications, that he managed from 2019 to 2024. He is now leader of ChipsWIN, the Walloon competence centre in semiconductors, strategic advisor for various startups, and part-time guest lecturer at ICHEC Brussels Management School.
Training portfolio
14:30 – 14:40
Renaud Gillon, Imagine Microelectronics
Renaud Gillon
Renaud Gillon obtained his master and doctoral degrees from the Université catholique de Louvain in 1991 and 1998 respectively. He has worked for more than 27 years in the microelectronics industry, as modelling engineer, modelling manager, and program manager for research and innovation programs on design methods and tools, all on the site of Oudenaarde, and successively for Alcatel Microelectronics, AMIS Semiconductor Belgium and ON Semiconductor Belgium. He founded SYDELITY BV in 2015 and is devoting 100% of his time to it since Novembre 2021. At SYDELITY, he is focusing on developing tools and methods to enable efficient system-level simulations and provides technical consulting in the fields of EMC, ESD and functional safety. He is a member of the IEEE P2427 workgroup on analogue fault coverage and the French FIDES workgroup on reliability models. He is chair of the Belgian branch of the IEC technical committee 56 on Dependability. Since 2024, he is active as Technical Manager at Imagine Microelectronics SRL, partner of the ChipsWIN consortium, a new venture supporting startups and SME’s to bring innovative microelectronics products to the market.
WELCOME characterization platform
14:40 – 14:50
Valeriya Kilchytska, UCLouvain
Valeriya Kilchytska
Valeriya Kilchytska is Senior Researcher, Logistic Director assuring scientific lead of the WELCOME Electrical Characterization Platform at UCLouvain. She received her PhD degree in semiconductor and dielectric physics from Taras Shevchenko National University of Kyiv, Ukraine in 1997. Her PhD work is on the electrical and radiation properties of Silicon-on-Insulator (SOI) structures. Then she worked at Kyiv Institute of Semiconductor Physics on the bias-temperature processes in SOI. In 2001, she was a visiting researcher at the Chalmers University of Technology, Sweden, for characterization of SiC MOS structures. She joined UCLouvain in 2002. She has a long-term experience in characterization, simulation and modelling of advanced devices with a focus on wide frequency band and noise characterization, performance assessment as well as cryogenic, high-temperature and radiation behavior. She has authored or co-authored > 300 scientific papers and conference contributions. She is a reviewer for numerous scientific journals and a TPC member of several conferences. Since 2023, she is a Deputy Director of SINANO Institute.
WINFAB micro/nano fabrication platform
14:50 – 15:00
Christian Renaux, UCLouvain
Christian Renaux
Christian Renaux received the Master degree in Electrical Engineering from Ecole centrale des arts et métiers (ECAM), Belgium in 1994 , and the Master of Science degree in Microelectronics and Computer Engineering from the University of Surrey, United Kingdom in 1996. From 1997 to 2014, he worked as a Research Engineer at the Université Catholique de Louvain and was in charge of the CMOS SOI fabrication. Since 2014, he is the general manager of the technological platform Winfab that is the Wallonia infrastructure for micro and nano fabrication at the université catholique de Louvain. He has authored or coauthored more than 65 technical papers or conference contributions and holds two patents.
LCA expertise
15:00 – 15:10
Robin Dethienne, UCLouvain
Robin Dethienne
Robin Dethienne the M.Sc. degree in electrical engineering from the Université catholique de Louvain (UCLouvain), Louvain-la-Neuve, Belgium in 2023. In 2022, he was an exchange student at the Universitat Politècnica de Catalunya, Spain. He is pursuing the PhD at UCLouvain in life-cycle assessment (LCA) of electronic products and ICT infrastructures. He has worked with several companies to perform the LCA of their products and has developed a parametric LCA modem of cellular basestations.
Coffee Break
15:10 – 15:30
Services provided by Imagine Microelectronics
15:30 – 15:45
Olivier Thirifays, Imagine Microelectronics
Services provided by IGNITY
15:45 – 16:00
Robert Bury, IGNITY
Panel discussion: Technological platforms user testimonials, interactions with the audience: “Role of Chips Competence Centres in boosting the innovations, as well as facilitating access to technological services and support”
16:00 – 16:35
Networking cocktail
17:00 – 19:00 Networking cocktail at Maxwell building
17:15 – 18:15 Visits of WELCOME and WINFAB technological platforms upon registration (2 x 2 groups in parallel)
