FD-SOI ICs Design Opportunities Short Course
- Grenoble, France
- 21st–22nd September 2026
- Pre-registration are open
- Fee : From 790€
In summary
This short course on FD-SOI technology is intended for experienced chip designers, technologists and newcomers to the field. Led by industry experts, it will provide a comprehensive overview of FD-SOI technology and its benefits, addressing multiple aspects of circuit design.
Participants will learn how to efficiently design digital, analog and RF circuits for key application markets. The tutorials will present advanced FD-SOI design techniques and methodologies that drive the development of innovative IP and products across various domains.
TRAINING PROGRAM
Day 1 – 13:30-17:30
WELCOME AND INTRODUCTION
- Arrival and welcome of participants
- Unlocking Design Potential with FD-SOI: Next Wave in Semiconductor Innovation
- FAMES project overview and opportunities
Break – 15:00-15:30 (30’)
FD-SOI : PRINCIPLES AND INNOVATION OPPORTUNITIES
- From Bulk CMOS to FD-SOI
- Taking advantage of FD-SOI transistor – Advanced RF Design with CMOS FD-SOI:
Performance, Efficiency and Design Flexibility - Evolution of technologies from 10nm & 7nm Nodes until the end of Roadma
Day 2 – 08:30-16:30
USING FD-SOI TO DRIVE ADVANCED CHIP ARCHITECTURE DEVELOPMENT
- FD-SOI design flow for digital circuits design
Break – 10:00-10:30 (30’)
- FD-SOI technology: is it a game changer in Power Management Design?
- Benefits of FD-SOI for the design of oscillators
- Unlocking RF Design with FD-SOI: Key Advantages and Opportunities
Lunch and networking – 12:00-13:30
- An immersive clean room experience at CEA-Leti
- 10nm FD-SOI Pathfinding DK : From generative methods to technology benchmarking
- Non-Volatile Memories for Embedded Solutions on 22 nm FD-SOI Node and Beyond
- FAMES collaboration opportunities and open access mechanisms
Wrap-up
Audience
This course is primarily aimed at technologists, engineers and scientists who are actively engaged in researching, developing and manufacturing advanced electronic devices. This includes students and professionals from industry and academia who are interested in integrating, fabricating and scaling electronic systems. These individuals may include:
- Chip designers involved in the development of low-power, high-performance ICs.
- Device and process engineers working on advanced node development and integration.
- R&D scientists exploring next-generation technologies for scalable electronics.
- Technology managers and system architects may also be interested in gaining seeking a deeper scientific and technical understanding of FD-SOI platforms.
Prerequisites
This course is designed to establish the scientific foundation for the complete design–integration–production chain of FD-SOI devices and related technologies. Participants are expected to have a solid understanding of integrated circuit design fundamentals, including CMOS technology, digital and analog circuit design principles, process design flows, and basic layout techniques. Prior experience with device modelling and simulation tools would be an advantage.
