Emerging memory technologies like RRAM offer promising advantages for next-generation memory, in-memory computing, and hardware security. Stabilizing switching behavior for reliable memory operation is crucial as well as harnessing intrinsic stochasticity. Improving our understanding of conductive‑filament dynamics, compliance‑current effects, and switching properties enables progress in both domains, leading to more robust memory devices as well as stronger, more resilient hardware security mechanisms.

The first study focuses on the impact of compliance current on resistive switching properties in RRAM devices.  It analyzes physical device behavior, focusing on conductive‑filament formation, electrical characteristics, and switching stability under different compliance‑current conditions.

The second study presents a modeling approach for RRAM-based Physical Unclonable Functions (PUFs). The authors develop a device-level model capturing intrinsic device variability. It enables evaluation of RRAM suitability for hardware security applications such as authentication and cryptographic key generation.

Stochastic variations that hinder memory reliability form the basis for hardware security primitives such as physically unclonable functions (PUFs). To exploit this randomness effectively, it must be accurately statistically modeled, predicted, and integrated into robust PUF architectures that preserve device uniqueness, uniformity, and reliability under real-world operating conditions. Achieving this balance requires a deep understanding of both the physical switching mechanisms of RRAM and its variability.

In general, the work leverages the stochastic properties of devices to develop and evaluate hardware security architectures, demonstrating how variability becomes a feature rather than a drawback.

Together, these works connect experimental device physics with higher-level modeling and application requirements.

The research directly benefits from advanced micro- and nanoelectronic research infrastructure and process know-how developed within the FAMES Pilot Line ecosystem. Access to state-of-the-art capabilities and expertise in emerging semiconductor devices enabled analysis and validation of selected concepts relevant to industrial use cases.

These results support FAMES objectives by strengthening the understanding of properties of emerging memory devices and showing the potential application concepts. A good understanding of device physics and validated device models is essential for transferring technologies from research to pilot-line manufacturing and future industrial adoption.

The findings are applicable to a reliable eNVM application in hardware security concepts. They provide a foundation for further research on process optimization, circuit-level integration, and industry-driven R&D within the FAMES ecosystem.