Sustainability
Sustainability in FAMES
The ICT industry has expressed concern and is engaged in contributing to the 2050 Net Zero objectives. The question of the environmental impacts of microelectronics is now addressed throughout the entire semiconductor manufacturing value chain. New technologies are being carefully analysed from a sustainability perspective, to understand the potential of reducing its impact.
How are the 10 and 7nm FD-SOI technology nodes positionned, in this context? The FAMES Pilot Line will evaluate the following aspects:
- FD-SOI circuit performance gain versus comparable technologies;
- Environmental impact of manufacturing FD-SOI relative to other equivalent solutions available on the market.
- Enable the possibility to anticipate environmental impacts at early stage of design to mitigate them.
FAMES Eco Innovation Offer
Eco-innovation for more sustainable electronics
Reducing the impact of electronics through R&D
- The development and implementation of life cycle analyses (LCA) methodology
- The evaluation of eco-innovative solutions in a production-like environment
- The development of technologies and end-to-end systems to meet specific environmental criteria for identified use cases
16 environmental footprint criteria
The FAMES Pilot Line will accompany Users interested in creating more sustainable FD-SOI manufacturing processes with reduced environmental impacts. The methodology that will be deployed by the FAMES Pilot Line is built around 3 axes:
This activity will be carried out with other European RTOs. The goal is to:
- Develop and improve LCA methodologies to allow a dynamic and parametric LCA able to quantify the contributions from different sources (processes, equipment, technology module…);
- Improve reference databases so they are better adapted to the ICT industry;
- Investigate the concept of absolute LCA to potentially integrate the planetary boundary limits into the LCA methodology;
- Evaluate data confidentiality requirements for LCA calculations. Understand the risk of enabling reverse technology engineering from public LCA inputs and outputs.
The goal is to design a SW platform that can gather all the LCA information to generate parametric LCA information used to guide fab or process engineers in their development work. Ultimately, this SW platform would enable the creation of performant and sustainable process/technology solutions. The information required to develop the platform will be collected at:
- The Fab level: power (fab & equipment), water (in and out), e-waste including potential recycling;
- The Process level: identifying all process information related to the process, material consumption, power/water usage, e-waste;
- The Equipment and sub-equipment level: quantifying specific needs during idle mode (power, water, chemistries…) and purging sequences;
- The Technology flow level: covering all the required process steps to generate complete LCAs.
Using the SW platform should allow engineers to identify the hotspots of a newly developed component. The final goal is to be able to link design parameters to manufacturing parameters, at early stage of development to better understand the environmental impacts and potential levers of action. Microelectronic would enter in a systemic PPACE optimisation, by applying eco-design at early stage of development. This will also give the opportunities, in partnership with future users of the Pilot Line, to balance the environmental implications of manufacturing in balance with the use phase of new components for specific use cases.
See more
- Press Release
- Event
- Event
Accelerating Semiconductor Innovation: Highlights from FAMES workshop in Austria The EU Chips Access & Innovation Workshop, organized by Silicon Austria Labs (SAL) and partners of FAMES, AT-C³, and EuroCDP, brought...
- Event
