As semiconductor devices continue to require higher current levels at increasingly lower voltages, interleaved interconnect paths between voltage regulators and processors generate parasitic resistance and inductance, resulting in power losses, voltage droop, and degraded transient performance.

In this context, vertical power delivery has emerged as a key architectural requirement. Heterogeneous integration technologies provide a major enabling solution by bringing power conversion functions into closer to the application specific integrated circuit (ASIC).

To address these challenges, Tyndall National Institute and CEA-Leti are collaborating on a 3D integrated DC-DC converter designed to bring power conversion directly inside advanced semiconductor packages.

The solution explored by Tyndall and CEA-Leti consists in moving the DC-DC converter directly inside the package, placing the power conversion stage in extremely close proximity to the ASIC load. This approach significantly shortens current paths and enables significantly higher power density delivery.

The demonstrator combines three key technological building blocks:

• High-frequency integrated inductors developed by Tyndall;
• A high-density capacitive silicon interposer developed by CEA-Leti;
• A 3-level two-phase hybrid DC-DC converter architecture designed by CEA-Leti and fabricated in a 22nm FD-SOI CMOS technology.

Together, these technologies form a compact heterogeneous power delivery platform targeting next-generation integrated systems.

A key innovation of the project is the use of a high-density capacitive interposer. In conventional power converters, discrete capacitors or inductors occupy a significant portion of the board area and limit achievable current density. By integrating dense capacitive networks directly inside the silicon interposer CEA-Leti enables local energy storage extremely close to both the converter and the ASIC. In addition, the adoption of a 3-level, two-phase DC-DC PMIC architecture significantly relaxes the constraints imposed on the inductors, thereby enabling the use of compact integrated inductors.

The interposer additionally provides routing infrastructure for the compact integration of active dies and inductors inside a unified 3D assembly. This heterogeneous integration approach is essential for future computing systems where power efficiency and space optimization are equally critical.

Tyndall’s integrated stripline inductors operate efficiently at MHz-range switching frequencies while maintaining low losses and strong magnetic performance. Higher switching frequency enables reduced inductance values, allowing the magnetic components to shrink sufficiently for interposer-level integration. This close integration greatly reduces power distribution impedance and supports very high transient current delivery.

Combined with high-performance 5 nH inductors operating at 25 MHz and 1 µF integrated capacitors, the architecture is designed to deliver output currents of up to 2 A at a regulated output voltage of 0.8 V from a 1.8 V input supply, while occupying a PMIC area of only 2.5 mm².

The converter achieves an efficiency exceeding 85% across an output power range of 600 mW to 1.5 W, with a peak efficiency exceeding 86.5 %. Ongoing work is focused on further improving efficiency by reducing the resistance associated with capacitor access paths within the interposer.