The semiconductor industry is increasingly turning to 3D integration to overcome the limitations of traditional 2D scaling. As performance, bandwidth, and energy efficiency demands continue to rise, advanced die stacking (particularly die-to-wafer (D2W) hybrid bonding) has emerged as a key enabler of next-generation architectures. In this context, CEA-Leti has developed the BALI mask set to address both scientific and industrial challenges in heterogeneous 3D integration. BALI is designed to explore fine-pitch bonding, high-density vertical interconnects, and new methods for post-bonding accessibility, thereby supporting a variety of innovative chiplet-based system designs.

BALI includes 19 lithography layers and supports over 100,000 interconnect structures, addressing multiple pitches from 5 µm down to 1 µm. It represents one of the most ambitious internal test vehicles created at CEA-Leti in terms of both complexity and functionality. For the first time, BALI enables the electrical characterization of bonded and thinned dies, a significant milestone in this domain. The mask set includes several post-bonding access schemes as front-side via access, high-density TSVs, or backside TSVs through a reconstituted carrier. Delivered in February 2025, the BALI mask set is now being used to validate bonding accuracy, TSV integrity, and die stacking reliability across several pilot flows. Its integration into a shared Design Rule Manual (DRM) and Process Design Kit (PDK) ensures compatibility with the CEA-Leti 3D platform.

The FAMES project provided the framework and strategic alignment needed to justify and coordinate the development of such a comprehensive test vehicle. FAMES also enabled the funding, resource allocation, and roadmap alignment necessary to integrate BALI within a larger technological vision for chiplet integration and hybrid bonding.

BALI represents a key step in FAMES by delivering the first multi-project test vehicle capable of supporting full electrical validation of advanced 3D integration schemes. It consolidates the process bricks required for future demonstrators and ensures the technical feasibility of hybrid integration at industrial scale. The BALI PDK is currently being adapted into the MPW MAD305 to support future developments under the FAMES project, and is also planned for deployment in the PREVAIL pilot line, which focuses on packaging technologies for advanced 3D systems.

Initial experimental results and validations using BALI are expected during 2025–2026. It will establish the definition of new 3D integration standards at CEA-Leti and it will guide the future of 3D design at Leti and beyond. Potential applications range from high-performance computing to AI and edge devices, where compact, high-bandwidth, energy-efficient integration is critical. Publications and technology demonstrations based on BALI are expected at leading conferences including IEDM, ECTC and VLSI in the coming years.