FAMES Pilot Line & SiNANO Institute to Present FAMES’ Latest Technical Results at ESSERC 2026 in Palma de Mallorca, Spain

The FAMES Pilot Line: Opportunities for the Next Generation of Chips, Dominique Noguet

An overview of the €830 million initiative’s five technology programmes and of how semiconductor stakeholders can gain access to the pilot line and its technologies.

SiNANO Institute: Connecting Europe’s Nanoelectronics Community, Giorgos Fagas

How the European nanoelectronics association is linking the FAMES Pilot Line to the wider research and industrial ecosystem

Next Generations of FD-SOI Technology for Low-Power and RF Applications, Thierry Poiroux, CEA-Leti, and Valeriya Kilchytska, UCLouvain

A detailed look at the 10nm FD-SOI technology developed in FAMES — designed to be 50 percent more power-efficient at constant speed, or 30 percent faster at a given power, than 22nm — and the performance boosters in the transistor architecture that make the leap possible. The second part shows how FD-SOI specificities such as local back biasing can be exploited at the circuit level, tuning different parts of a chip for high performance or extremely low leakage.

Achievements FAMES Already Produced for the Development of Embedded Non-Volatile Memories in Europe, Gabriel Parès, CEA-Leti

A midterm status report on the four eNVM flavors — OxRAM, FeRAM, MRAM and BEOL Fe(M)FET — an essential add-on to FD-SOI platforms at 10nm and 7nm, where flash no longer scales. Results span MRAM stochasticity as an entropy source for hardware security to FeRAM/FeFET as candidates to replace SRAM and eDRAM in last-level cache (>10¹¹ endurance, 10ns latency, <100 fJ/bit).

Reliable RRAM-Based Physically Unclonable Functions for Energy-Efficient Hardware Security, Piotr Wiśniewski, CEZAMAT, Warsaw University of Technology

A view on how the intrinsic stochastic variability of resistive switching generates unique cryptographic signatures for authentication and secure key generation, with a focus on response reproducibility and an optimized RRAM control scheme. RRAM’s non-volatile, CMOS-compatible nature enables robust, low-power root-of-trust primitives for next-generation secure IoT, embedded and edge computing.

Solidly Mounted Lithium Niobate Bulk Acoustic Wave Filters for the FR3 Range, Alexandre Reinhardt, CEA-Leti

A presentation on 6GFR3 range (7–24 GHz) bandpass filters that let mobile communications share the spectrum with existing satellite and emergency services. The talk presents CEA-Leti’s ongoing work to bring acoustic filters from sub-6 GHz into FR3 by leveraging single-crystal piezoelectric materials.

Advancing 3D Sequential Integration: Process Innovations and Future Applications, Daphnée Bosch, CEA-Leti

Showcasing latest 3D sequential integration advances including versatile 2.5V n- and p-type SOI MOSFETs fabricated entirely at 400°C, which overcomes critical low-temperature challenges and opens the door to large-scale industrial adoption. These results also include the first millimeter-wave RF circuits fabricated in the top tier of a full 3DSI process for 5G, with no degradation despite the close vicinity of both tiers. The presentation extends the 3DSI vision to advanced imaging and energy-efficient computing.

The Rise of Heterogeneous Integration and 3D Architectures as Key Enablers in the AI Era, Emmanuel Ollier, CEA-Leti

An explanation of why sub-2nm nodes alone can no longer meet AI’s computational demands; cloud and edge-AI now call for architectures that drastically cut data movement, latency and power consumption. The talk shows how FAMES drives the advanced packaging behind them — small-pitch hybrid bonding and through-silicon via (TSV) technologies — and the novel computing and RF architectures they enable.

Small Inductors for DC-DC Converters: Power Management Integrated Circuits, Sambuddha Khan, Tyndall National Institute

Delivering Tyndall’s magnetics-on-silicon platform stripline micro-inductors (5–10 nH, 20–50 MHz) with optimized CoZrTa/AlN laminated cores and quality factors above 8, integrated onto glass substrates or into silicon trenches by tether-free micro-transfer printing while preserving inductance within ±10 percent. The talk outlines the route to buried inductor-capacitor power networks in interposers and access through the FAMES ACCESS programme.